Various techniques are known in the art for verifying the success of programming operations in non-volatile memory devices, such as Flash memory. For example, U.S. Pat. No. 7,434,111, whose disclosure is incorporated herein by reference, describes a non-volatile memory comprising a non-volatile memory and a memory controller. The non-volatile memory has a pseudo pass function of returning a pass as a status even if a bit error reaching an allowable number of bits occurs after at least one of a write or erase sequence is completed. The memory controller has an allowable bit change function of changing the upper limit value of the allowable number of bits.
As another example, U.S. Pat. No. 5,469,444, whose disclosure is incorporated herein by reference, describes an electrically erasable and programmable non-volatile memory system with write-verify controller using two reference levels. An EEPROM includes an array of memory cell transistors, which is divided into cell blocks each including NAND cell units of series-connected cell transistors. A sense amplifier is connected to bit lines and a comparator. A data-latch circuit is connected to the comparator, for latching a write-data supplied from a data input buffer. The comparator compares the actual data read from one of the programmed cell transistors with the write-data, to verify its written state. The write-verify process checks the resulting threshold voltage for variations using first and second reference voltages defining the lower-limit and upper-limit of an allowable variation range.
As yet another example, U.S. Pat. No. 6,278,632, whose disclosure is incorporated herein by reference, describes a method for detecting an under-programming or over-programming condition in a multistate memory cell. The method uses three sense amplifiers, each with an associated reference cell that produces a reference voltage for input to each of the sense amplifiers. Control circuitry is used, which allows the reference cell currents to be varied to produce the reference voltages or pairs of reference voltages needed to accurately determine the threshold voltage and hence state of a programmed or erased memory cell. This information is used by a controller to determine if a memory cell has been over-programmed, under-programmed, or properly programmed.